diff --git a/src/arch/x86_64/macros.rs b/src/arch/x86_64/macros.rs
index 5ad34d8..dbbd424 100644
--- a/src/arch/x86_64/macros.rs
+++ b/src/arch/x86_64/macros.rs
@@ -281,7 +281,9 @@ impl InterruptStack {
         self.scratch.rcx = all.rcx;
         self.scratch.rax = all.rax;
         self.iret.rip = all.rip;
-        self.iret.cs = all.cs;
+
+        // These should probably be restricted
+        // self.iret.cs = all.cs;
         // self.iret.rflags = all.eflags;
     }
     /// Enables the "Trap Flag" in the FLAGS register, causing the CPU
diff --git a/src/scheme/proc.rs b/src/scheme/proc.rs
index b91831a..750ae64 100644
--- a/src/scheme/proc.rs
+++ b/src/scheme/proc.rs
@@ -26,20 +26,6 @@ use core::{
 };
 use spin::{Mutex, RwLock};
 
-#[derive(Clone, Copy)]
-enum RegsKind {
-    Float,
-    Int
-}
-#[derive(Clone)]
-enum Operation {
-    Memory(VirtualAddress),
-    Regs(RegsKind),
-    Trace {
-        clones: Vec<ContextId>
-    }
-}
-
 fn with_context<F, T>(pid: ContextId, callback: F) -> Result<T>
     where F: FnOnce(&Context) -> Result<T>
 {
@@ -101,6 +87,20 @@ fn try_stop_context<F, T>(pid: ContextId, restart_after: bool, mut callback: F)
     }
 }
 
+#[derive(Clone, Copy)]
+enum RegsKind {
+    Float,
+    Int
+}
+#[derive(Clone)]
+enum Operation {
+    Memory(VirtualAddress),
+    Regs(RegsKind),
+    Trace {
+        clones: Vec<ContextId>
+    }
+}
+
 #[derive(Clone, Copy)]
 struct Info {
     pid: ContextId,