From 418051ac78bc3c1b789b6ddc30c1ffb4b449474e Mon Sep 17 00:00:00 2001 From: 4lDO2 <4lDO2@protonmail.com> Date: Sat, 26 Feb 2022 14:38:38 +0100 Subject: [PATCH] Replace llvm_asm with asm to support stable Rust. --- src/arch/x86_64.rs | 1 + src/io/mmio.rs | 6 +++--- src/io/pio.rs | 15 ++++++++------- src/lib.rs | 2 -- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/arch/x86_64.rs b/src/arch/x86_64.rs index 6ba5121..f71898e 100644 --- a/src/arch/x86_64.rs +++ b/src/arch/x86_64.rs @@ -1,4 +1,5 @@ use core::{mem, slice}; +use core::arch::asm; use core::ops::{Deref, DerefMut}; use super::error::{Error, Result}; diff --git a/src/io/mmio.rs b/src/io/mmio.rs index 42251ad..3966ab4 100644 --- a/src/io/mmio.rs +++ b/src/io/mmio.rs @@ -1,4 +1,4 @@ -use core::ptr::{read_volatile, write_volatile}; +use core::ptr::{read_volatile, write_volatile, addr_of, addr_of_mut}; use core::mem::MaybeUninit; use core::ops::{BitAnd, BitOr, Not}; @@ -36,10 +36,10 @@ impl Io for Mmio where T: Copy + PartialEq + BitAnd + BitOr T { - unsafe { read_volatile(self.value.as_ptr()) } + unsafe { read_volatile(addr_of!(self.value).cast::()) } } fn write(&mut self, value: T) { - unsafe { write_volatile(self.value.as_mut_ptr(), value) }; + unsafe { write_volatile(addr_of_mut!(self.value).cast::(), value) }; } } diff --git a/src/io/pio.rs b/src/io/pio.rs index 3d4d696..8b837bc 100644 --- a/src/io/pio.rs +++ b/src/io/pio.rs @@ -1,3 +1,4 @@ +use core::arch::asm; use core::marker::PhantomData; use super::io::Io; @@ -13,7 +14,7 @@ impl Pio { /// Create a PIO from a given port pub const fn new(port: u16) -> Self { Pio:: { - port: port, + port, value: PhantomData, } } @@ -28,7 +29,7 @@ impl Io for Pio { fn read(&self) -> u8 { let value: u8; unsafe { - llvm_asm!("in $0, $1" : "={al}"(value) : "{dx}"(self.port) : "memory" : "intel", "volatile"); + asm!("in al, dx", in("dx") self.port, out("al") value, options(nostack, nomem, preserves_flags)); } value } @@ -37,7 +38,7 @@ impl Io for Pio { #[inline(always)] fn write(&mut self, value: u8) { unsafe { - llvm_asm!("out $1, $0" : : "{al}"(value), "{dx}"(self.port) : "memory" : "intel", "volatile"); + asm!("out dx, al", in("dx") self.port, in("al") value, options(nostack, nomem, preserves_flags)); } } } @@ -51,7 +52,7 @@ impl Io for Pio { fn read(&self) -> u16 { let value: u16; unsafe { - llvm_asm!("in $0, $1" : "={ax}"(value) : "{dx}"(self.port) : "memory" : "intel", "volatile"); + asm!("in ax, dx", in("dx") self.port, out("ax") value, options(nostack, nomem, preserves_flags)); } value } @@ -60,7 +61,7 @@ impl Io for Pio { #[inline(always)] fn write(&mut self, value: u16) { unsafe { - llvm_asm!("out $1, $0" : : "{ax}"(value), "{dx}"(self.port) : "memory" : "intel", "volatile"); + asm!("out dx, ax", in("dx") self.port, in("ax") value, options(nostack, nomem, preserves_flags)); } } } @@ -74,7 +75,7 @@ impl Io for Pio { fn read(&self) -> u32 { let value: u32; unsafe { - llvm_asm!("in $0, $1" : "={eax}"(value) : "{dx}"(self.port) : "memory" : "intel", "volatile"); + asm!("in eax, dx", in("dx") self.port, out("eax") value, options(nostack, nomem, preserves_flags)); } value } @@ -83,7 +84,7 @@ impl Io for Pio { #[inline(always)] fn write(&mut self, value: u32) { unsafe { - llvm_asm!("out $1, $0" : : "{eax}"(value), "{dx}"(self.port) : "memory" : "intel", "volatile"); + asm!("out dx, eax", in("dx") self.port, in("eax") value, options(nostack, nomem, preserves_flags)); } } } diff --git a/src/lib.rs b/src/lib.rs index 548097c..00cad18 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,5 +1,3 @@ -#![feature(asm)] -#![feature(llvm_asm)] #![cfg_attr(not(test), no_std)] #[cfg(test)]