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aarch64: Make IRQs use the exception macros

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This commit is contained in:
Robin Randhawa
2021-01-26 19:37:23 +00:00
parent 9621c64991
commit 00723c4ac2
3 changed files with 28 additions and 391 deletions
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26
src/arch/aarch64/init/pre_kstart/helpers/vectors.S
View File

@@ -18,21 +18,21 @@ __vec_00:
.align 7
__vec_01:
mov x18, #0xb0b1
b do_exception_irq
b irq_at_el1
b __vec_01
// FIQ
.align 7
__vec_02:
mov x18, #0xb0b2
b do_exception_unhandled
b unhandled_exception
b __vec_02
// SError
.align 7
__vec_03:
mov x18, #0xb0b3
b do_exception_unhandled
b unhandled_exception
b __vec_03
// Synchronous
@@ -46,21 +46,21 @@ __vec_04:
.align 7
__vec_05:
mov x18, #0xb0b5
b do_exception_irq
b irq_at_el1
b __vec_05
// FIQ
.align 7
__vec_06:
mov x18, #0xb0b6
b do_exception_unhandled
b unhandled_exception
b __vec_06
// SError
.align 7
__vec_07:
mov x18, #0xb0b7
b do_exception_unhandled
b unhandled_exception
b __vec_07
// Synchronous
@@ -74,49 +74,49 @@ __vec_08:
.align 7
__vec_09:
mov x18, #0xb0b9
b do_exception_irq
b irq_at_el0
b __vec_09
// FIQ
.align 7
__vec_10:
mov x18, #0xb0ba
b do_exception_unhandled
b unhandled_exception
b __vec_10
// SError
.align 7
__vec_11:
mov x18, #0xb0bb
b do_exception_unhandled
b unhandled_exception
b __vec_11
// Synchronous
.align 7
__vec_12:
mov x18, #0xb0bc
b do_exception_unhandled
b unhandled_exception
b __vec_12
// IRQ
.align 7
__vec_13:
mov x18, #0xb0bd
b do_exception_unhandled
b unhandled_exception
b __vec_13
// FIQ
.align 7
__vec_14:
mov x18, #0xb0be
b do_exception_unhandled
b unhandled_exception
b __vec_14
// SError
.align 7
__vec_15:
mov x18, #0xb0bf
b do_exception_unhandled
b unhandled_exception
b __vec_15
.align 7

131
src/arch/aarch64/interrupt/irq.rs
View File

@@ -7,127 +7,26 @@ use crate::device::{gic};
use crate::device::serial::{COM1};
use crate::time;
use crate::{exception_stack};
//resets to 0 in context::switch()
pub static PIT_TICKS: AtomicUsize = ATOMIC_USIZE_INIT;
#[naked]
#[no_mangle]
pub unsafe extern fn do_exception_irq() {
#[inline(never)]
unsafe fn inner() {
irq_demux();
exception_stack!(irq_at_el0, |stack| {
match gic::irq_ack() {
30 => irq_handler_gentimer(30),
33 => irq_handler_com1(33),
_ => panic!("irq_demux: unregistered IRQ"),
}
});
llvm_asm!("str x0, [sp, #-8]!
str x1, [sp, #-8]!
str x2, [sp, #-8]!
str x3, [sp, #-8]!
str x4, [sp, #-8]!
str x5, [sp, #-8]!
str x6, [sp, #-8]!
str x7, [sp, #-8]!
str x8, [sp, #-8]!
str x9, [sp, #-8]!
str x10, [sp, #-8]!
str x11, [sp, #-8]!
str x12, [sp, #-8]!
str x13, [sp, #-8]!
str x14, [sp, #-8]!
str x15, [sp, #-8]!
str x16, [sp, #-8]!
str x17, [sp, #-8]!
str x18, [sp, #-8]!
str x19, [sp, #-8]!
str x20, [sp, #-8]!
str x21, [sp, #-8]!
str x22, [sp, #-8]!
str x23, [sp, #-8]!
str x24, [sp, #-8]!
str x25, [sp, #-8]!
str x26, [sp, #-8]!
str x27, [sp, #-8]!
str x28, [sp, #-8]!
str x29, [sp, #-8]!
str x30, [sp, #-8]!
mrs x18, sp_el0
str x18, [sp, #-8]!
mrs x18, esr_el1
str x18, [sp, #-8]!
mrs x18, spsr_el1
str x18, [sp, #-8]!
mrs x18, tpidrro_el0
str x18, [sp, #-8]!
mrs x18, tpidr_el0
str x18, [sp, #-8]!
str x18, [sp, #-8]!
mrs x18, elr_el1
str x18, [sp, #-8]!"
: : : : "volatile");
inner();
llvm_asm!("ldr x18, [sp], #8
msr elr_el1, x18
ldr x18, [sp], #8
ldr x18, [sp], #8
msr tpidr_el0, x18
ldr x18, [sp], #8
msr tpidrro_el0, x18
ldr x18, [sp], #8
msr spsr_el1, x18
ldr x18, [sp], #8
msr esr_el1, x18
ldr x18, [sp], #8
msr sp_el0, x18
ldr x30, [sp], #8
ldr x29, [sp], #8
ldr x28, [sp], #8
ldr x27, [sp], #8
ldr x26, [sp], #8
ldr x25, [sp], #8
ldr x24, [sp], #8
ldr x23, [sp], #8
ldr x22, [sp], #8
ldr x21, [sp], #8
ldr x20, [sp], #8
ldr x19, [sp], #8
ldr x18, [sp], #8
ldr x17, [sp], #8
ldr x16, [sp], #8
ldr x15, [sp], #8
ldr x14, [sp], #8
ldr x13, [sp], #8
ldr x12, [sp], #8
ldr x11, [sp], #8
ldr x10, [sp], #8
ldr x9, [sp], #8
ldr x8, [sp], #8
ldr x7, [sp], #8
ldr x6, [sp], #8
ldr x5, [sp], #8
ldr x4, [sp], #8
ldr x3, [sp], #8
ldr x2, [sp], #8
ldr x1, [sp], #8
ldr x0, [sp], #8"
: : : : "volatile");
llvm_asm!("eret" :::: "volatile");
}
exception_stack!(irq_at_el1, |stack| {
match gic::irq_ack() {
30 => irq_handler_gentimer(30),
33 => irq_handler_com1(33),
_ => panic!("irq_demux: unregistered IRQ"),
}
});
unsafe fn trigger(irq: u32) {
extern {

262
src/arch/aarch64/interrupt/syscall.rs
View File

@@ -8,232 +8,9 @@ use crate::{
#[no_mangle]
pub unsafe extern fn do_exception_unhandled() {}
/*
#[naked]
#[no_mangle]
pub unsafe extern fn do_exception_unhandled() {
#[inline(never)]
unsafe fn inner(stack: &mut InterruptStack) -> usize {
println!("do_exception_unhandled: ELR: 0x{:016x}", stack.elr_el1);
loop {}
}
llvm_asm!("str x0, [sp, #-8]!
str x1, [sp, #-8]!
str x2, [sp, #-8]!
str x3, [sp, #-8]!
str x4, [sp, #-8]!
str x5, [sp, #-8]!
str x6, [sp, #-8]!
str x7, [sp, #-8]!
str x8, [sp, #-8]!
str x9, [sp, #-8]!
str x10, [sp, #-8]!
str x11, [sp, #-8]!
str x12, [sp, #-8]!
str x13, [sp, #-8]!
str x14, [sp, #-8]!
str x15, [sp, #-8]!
str x16, [sp, #-8]!
str x17, [sp, #-8]!
str x18, [sp, #-8]!
str x19, [sp, #-8]!
str x20, [sp, #-8]!
str x21, [sp, #-8]!
str x22, [sp, #-8]!
str x23, [sp, #-8]!
str x24, [sp, #-8]!
str x25, [sp, #-8]!
str x26, [sp, #-8]!
str x27, [sp, #-8]!
str x28, [sp, #-8]!
str x29, [sp, #-8]!
str x30, [sp, #-8]!
mrs x18, sp_el0
str x18, [sp, #-8]!
mrs x18, esr_el1
str x18, [sp, #-8]!
mrs x18, spsr_el1
str x18, [sp, #-8]!
mrs x18, tpidrro_el0
str x18, [sp, #-8]!
mrs x18, tpidr_el0
str x18, [sp, #-8]!
str x18, [sp, #-8]!
mrs x18, elr_el1
str x18, [sp, #-8]!"
: : : : "volatile");
let sp: usize;
llvm_asm!("" : "={sp}"(sp) : : : "volatile");
llvm_asm!("mov x29, sp" : : : : "volatile");
let a = inner(&mut *(sp as *mut InterruptStack));
}
*/
#[no_mangle]
pub unsafe extern fn do_exception_synchronous() {}
/*
#[naked]
#[no_mangle]
pub unsafe extern fn do_exception_synchronous() {
#[inline(never)]
unsafe fn inner(stack: &mut InterruptStack) -> usize {
let exception_code = (stack.esr_el1 & (0x3f << 26)) >> 26;
if exception_code != 0b010101 {
println!("do_exception_synchronous: Non-SVC!!!");
loop {}
} else {
println!("do_exception_synchronous: SVC: x8: 0x{:016x}", stack.scratch.x8);
}
llvm_asm!("nop": : : : "volatile");
llvm_asm!("nop": : : : "volatile");
llvm_asm!("nop": : : : "volatile");
llvm_asm!("nop": : : : "volatile");
let fp;
llvm_asm!("" : "={fp}"(fp) : : : "volatile");
syscall::syscall(
stack.scratch.x8,
stack.scratch.x0,
stack.scratch.x1,
stack.scratch.x2,
stack.scratch.x3,
stack.scratch.x4,
fp,
stack
)
}
llvm_asm!("str x0, [sp, #-8]!
str x1, [sp, #-8]!
str x2, [sp, #-8]!
str x3, [sp, #-8]!
str x4, [sp, #-8]!
str x5, [sp, #-8]!
str x6, [sp, #-8]!
str x7, [sp, #-8]!
str x8, [sp, #-8]!
str x9, [sp, #-8]!
str x10, [sp, #-8]!
str x11, [sp, #-8]!
str x12, [sp, #-8]!
str x13, [sp, #-8]!
str x14, [sp, #-8]!
str x15, [sp, #-8]!
str x16, [sp, #-8]!
str x17, [sp, #-8]!
str x18, [sp, #-8]!
str x19, [sp, #-8]!
str x20, [sp, #-8]!
str x21, [sp, #-8]!
str x22, [sp, #-8]!
str x23, [sp, #-8]!
str x24, [sp, #-8]!
str x25, [sp, #-8]!
str x26, [sp, #-8]!
str x27, [sp, #-8]!
str x28, [sp, #-8]!
str x29, [sp, #-8]!
str x30, [sp, #-8]!
mrs x18, sp_el0
str x18, [sp, #-8]!
mrs x18, esr_el1
str x18, [sp, #-8]!
mrs x18, spsr_el1
str x18, [sp, #-8]!
mrs x18, tpidrro_el0
str x18, [sp, #-8]!
mrs x18, tpidr_el0
str x18, [sp, #-8]!
str x18, [sp, #-8]!
mrs x18, elr_el1
str x18, [sp, #-8]!"
: : : : "volatile");
let sp: usize;
llvm_asm!("" : "={sp}"(sp) : : : "volatile");
llvm_asm!("mov x29, sp" : : : : "volatile");
let a = inner(&mut *(sp as *mut InterruptStack));
llvm_asm!("" : : "{x0}"(a) : : "volatile");
llvm_asm!("ldr x18, [sp], #8
msr elr_el1, x18
ldr x18, [sp], #8
ldr x18, [sp], #8
msr tpidr_el0, x18
ldr x18, [sp], #8
msr tpidrro_el0, x18
ldr x18, [sp], #8
msr spsr_el1, x18
ldr x18, [sp], #8
msr esr_el1, x18
ldr x18, [sp], #8
msr sp_el0, x18
ldr x30, [sp], #8
ldr x29, [sp], #8
ldr x28, [sp], #8
ldr x27, [sp], #8
ldr x26, [sp], #8
ldr x25, [sp], #8
ldr x24, [sp], #8
ldr x23, [sp], #8
ldr x22, [sp], #8
ldr x21, [sp], #8
ldr x20, [sp], #8
ldr x19, [sp], #8
ldr x18, [sp], #8
ldr x17, [sp], #8
ldr x16, [sp], #8
ldr x15, [sp], #8
ldr x14, [sp], #8
ldr x13, [sp], #8
ldr x12, [sp], #8
ldr x11, [sp], #8
ldr x10, [sp], #8
ldr x9, [sp], #8
ldr x8, [sp], #8
ldr x7, [sp], #8
ldr x6, [sp], #8
ldr x5, [sp], #8
ldr x4, [sp], #8
ldr x3, [sp], #8
ldr x2, [sp], #8
ldr x1, [sp], #8
add sp, sp, #8" /* Skip over x0 - it's got the retval of inner already */
: : : : "volatile");
llvm_asm!("eret" :::: "volatile");
}
*/
#[allow(dead_code)]
#[repr(packed)]
pub struct SyscallStack {
@@ -285,45 +62,6 @@ macro_rules! with_exception_stack {
}}
}
#[no_mangle]
pub unsafe extern "C" fn __inner_syscall_instruction(stack: *mut InterruptStack) {
with_exception_stack!(|stack| {
// Set a restore point for clone
let fp;
asm!("mov {}, fp", out(reg) fp);
let scratch = &stack.scratch;
syscall::syscall(scratch.x8, scratch.x0, scratch.x1, scratch.x2, scratch.x3, scratch.x4, fp, stack)
});
}
function!(syscall_instruction => {
"
nop
",
// Push context registers
push_preserved!(),
push_scratch!(),
push_special!(),
// TODO: Map PTI
// Call inner function
"mov x0, sp\n",
"bl __inner_syscall_instruction\n",
// TODO: Unmap PTI
// Pop context registers
pop_special!(),
pop_scratch!(),
pop_preserved!(),
// Return
"eret\n",
});
function!(clone_ret => {
"ldp x29, x30, [sp], #16\n",
"mov sp, x29\n",