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Merge branch 'latest-rust' into 'master'

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Support latest rust

See merge request redox-os/kernel!140
This commit is contained in:
Jeremy Soller
2020-08-01 12:22:17 +00:00
parent c8fb3792a9 895c0c11da
commit c8263cc4bd
15 changed files with 70 additions and 56 deletions
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5
.cargo/config Normal file
View File

@@ -0,0 +1,5 @@
[build]
rustflags = [
# Kernel should preserve floating-point registers
"-Csoft-float",
]

10
Cargo.lock generated
View File

@@ -33,11 +33,11 @@ dependencies = [
"linked_list_allocator 0.8.4 (registry+https://github.com/rust-lang/crates.io-index)",
"paste 0.1.18 (registry+https://github.com/rust-lang/crates.io-index)",
"raw-cpuid 8.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
"redox_syscall 0.1.56",
"redox_syscall 0.2.0",
"rustc-demangle 0.1.16 (registry+https://github.com/rust-lang/crates.io-index)",
"slab_allocator 0.3.1",
"spin 0.5.2 (registry+https://github.com/rust-lang/crates.io-index)",
"x86 0.29.0 (registry+https://github.com/rust-lang/crates.io-index)",
"x86 0.32.0 (registry+https://github.com/rust-lang/crates.io-index)",
]
[[package]]
@@ -113,7 +113,7 @@ dependencies = [
[[package]]
name = "redox_syscall"
version = "0.1.56"
version = "0.2.0"
dependencies = [
"bitflags 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
]
@@ -182,7 +182,7 @@ dependencies = [
[[package]]
name = "x86"
version = "0.29.0"
version = "0.32.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
dependencies = [
"bit_field 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)",
@@ -213,4 +213,4 @@ dependencies = [
"checksum spin 0.4.10 (registry+https://github.com/rust-lang/crates.io-index)" = "ceac490aa12c567115b40b7b7fceca03a6c9d53d5defea066123debc83c5dc1f"
"checksum spin 0.5.2 (registry+https://github.com/rust-lang/crates.io-index)" = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d"
"checksum spinning_top 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "32d801a3a53bcf5071f85fef8d5cab9e5f638fc5580a37e6eb7aba4b37438d24"
"checksum x86 0.29.0 (registry+https://github.com/rust-lang/crates.io-index)" = "6874753c331118b83f24d69325958b61f8ef47dbbc7aff2257a0bbe33fb24e3b"
"checksum x86 0.32.0 (registry+https://github.com/rust-lang/crates.io-index)" = "f8cc872a9a776500ccc6f49799729858738c946b8865fa7e3d6b47cc5dc3a8a7"

12
Cargo.toml
View File

@@ -28,7 +28,7 @@ version = "0.1.16"
default-features = false
[dependencies.x86]
version = "0.29.0"
version = "0.32.0"
default-features = false
[features]
@@ -44,3 +44,13 @@ qemu_debug = []
serial_debug = []
system76_ec_debug = []
slab = ["slab_allocator"]
[profile.dev]
# Kernel doesn't yet work great with debug mode :(
opt-level = 3
# LTO fixes some duplicate symbols of memcpy/memmove/etc
lto = true
[profile.release]
lto = true

6
src/arch/x86_64/graphical_debug/primitive.rs
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@@ -2,7 +2,7 @@
#[inline(always)]
#[cold]
pub unsafe fn fast_copy(dst: *mut u8, src: *const u8, len: usize) {
asm!("cld
llvm_asm!("cld
rep movsb"
:
: "{rdi}"(dst as usize), "{rsi}"(src as usize), "{rcx}"(len)
@@ -14,7 +14,7 @@ pub unsafe fn fast_copy(dst: *mut u8, src: *const u8, len: usize) {
#[inline(always)]
#[cold]
pub unsafe fn fast_set32(dst: *mut u32, src: u32, len: usize) {
asm!("cld
llvm_asm!("cld
rep stosd"
:
: "{rdi}"(dst as usize), "{eax}"(src), "{rcx}"(len)
@@ -26,7 +26,7 @@ pub unsafe fn fast_set32(dst: *mut u32, src: u32, len: usize) {
#[inline(always)]
#[cold]
pub unsafe fn fast_set64(dst: *mut u64, src: u64, len: usize) {
asm!("cld
llvm_asm!("cld
rep stosq"
:
: "{rdi}"(dst as usize), "{rax}"(src), "{rcx}"(len)

2
src/arch/x86_64/interrupt/exception.rs
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@@ -132,7 +132,7 @@ interrupt_error!(protection, |stack| {
interrupt_error!(page, |stack| {
let cr2: usize;
asm!("mov rax, cr2" : "={rax}"(cr2) : : : "intel", "volatile");
llvm_asm!("mov rax, cr2" : "={rax}"(cr2) : : : "intel", "volatile");
println!("Page fault: {:>016X}", cr2);
stack.dump();
stack_trace();

4
src/arch/x86_64/interrupt/handler.rs
View File

@@ -123,7 +123,7 @@ impl InterruptStack {
let cs: usize;
unsafe {
asm!("mov $0, cs" : "=r"(cs) ::: "intel");
llvm_asm!("mov $0, cs" : "=r"(cs) ::: "intel");
}
if self.iret.cs & CPL_MASK == cs & CPL_MASK {
@@ -132,7 +132,7 @@ impl InterruptStack {
+ mem::size_of::<Self>() // disregard Self
- mem::size_of::<usize>() * 2; // well, almost: rsp and ss need to be excluded as they aren't present
unsafe {
asm!("mov $0, ss" : "=r"(all.ss) ::: "intel");
llvm_asm!("mov $0, ss" : "=r"(all.ss) ::: "intel");
}
} else {
all.rsp = self.iret.rsp;

2
src/arch/x86_64/interrupt/irq.rs
View File

@@ -24,7 +24,7 @@ unsafe fn ps2_interrupt(_index: usize) {
let data: u8;
let status: u8;
asm!("
llvm_asm!("
sti
nop
cli

12
src/arch/x86_64/interrupt/mod.rs
View File

@@ -18,13 +18,13 @@ pub use super::device::local_apic::bsp_apic_id;
/// Clear interrupts
#[inline(always)]
pub unsafe fn disable() {
asm!("cli" : : : : "intel", "volatile");
llvm_asm!("cli" : : : : "intel", "volatile");
}
/// Set interrupts
#[inline(always)]
pub unsafe fn enable() {
asm!("sti" : : : : "intel", "volatile");
llvm_asm!("sti" : : : : "intel", "volatile");
}
/// Set interrupts and halt
@@ -32,7 +32,7 @@ pub unsafe fn enable() {
/// Performing enable followed by halt is not guaranteed to be atomic, use this instead!
#[inline(always)]
pub unsafe fn enable_and_halt() {
asm!("sti
llvm_asm!("sti
hlt"
: : : : "intel", "volatile");
}
@@ -42,7 +42,7 @@ pub unsafe fn enable_and_halt() {
/// Simply enabling interrupts does not gurantee that they will trigger, use this instead!
#[inline(always)]
pub unsafe fn enable_and_nop() {
asm!("sti
llvm_asm!("sti
nop"
: : : : "intel", "volatile");
}
@@ -50,12 +50,12 @@ pub unsafe fn enable_and_nop() {
/// Halt instruction
#[inline(always)]
pub unsafe fn halt() {
asm!("hlt" : : : : "intel", "volatile");
llvm_asm!("hlt" : : : : "intel", "volatile");
}
/// Pause instruction
/// Safe because it is similar to a NOP, and has no memory effects
#[inline(always)]
pub fn pause() {
unsafe { asm!("pause" : : : : "intel", "volatile"); }
unsafe { llvm_asm!("pause" : : : : "intel", "volatile"); }
}

4
src/arch/x86_64/interrupt/syscall.rs
View File

@@ -41,7 +41,7 @@ pub unsafe extern "C" fn __inner_syscall_instruction(stack: *mut InterruptStack)
with_interrupt_stack!(|stack| {
// Set a restore point for clone
let rbp;
asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
llvm_asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
let scratch = &stack.scratch;
syscall::syscall(scratch.rax, scratch.rdi, scratch.rsi, scratch.rdx, scratch.r10, scratch.r8, rbp, stack)
@@ -104,7 +104,7 @@ interrupt_stack!(syscall, |stack| {
// Set a restore point for clone
let rbp;
asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
llvm_asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
let scratch = &stack.scratch;
syscall::syscall(scratch.rax, stack.preserved.rbx, scratch.rcx, scratch.rdx, scratch.rsi, scratch.rdi, rbp, stack)

2
src/arch/x86_64/interrupt/trace.rs
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@@ -9,7 +9,7 @@ use crate::paging::{ActivePageTable, VirtualAddress};
#[inline(never)]
pub unsafe fn stack_trace() {
let mut rbp: usize;
asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
llvm_asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
println!("TRACE: {:>016X}", rbp);
//Maximum 64 frames

4
src/arch/x86_64/pti.rs
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@@ -20,7 +20,7 @@ pub static mut PTI_CONTEXT_STACK: usize = 0;
#[inline(always)]
unsafe fn switch_stack(old: usize, new: usize) {
let old_rsp: usize;
asm!("" : "={rsp}"(old_rsp) : : : "intel", "volatile");
llvm_asm!("" : "={rsp}"(old_rsp) : : : "intel", "volatile");
let offset_rsp = old - old_rsp;
@@ -32,7 +32,7 @@ unsafe fn switch_stack(old: usize, new: usize) {
offset_rsp
);
asm!("" : : "{rsp}"(new_rsp) : : "intel", "volatile");
llvm_asm!("" : : "{rsp}"(new_rsp) : : "intel", "volatile");
}
#[cfg(feature = "pti")]

4
src/arch/x86_64/start.rs
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@@ -242,7 +242,7 @@ pub unsafe fn usermode(ip: usize, sp: usize, arg: usize, singlestep: bool) -> !
flags |= 1 << 8;
}
asm!("push r10
llvm_asm!("push r10
push r11
push r12
push r13
@@ -262,7 +262,7 @@ pub unsafe fn usermode(ip: usize, sp: usize, arg: usize, singlestep: bool) -> !
pti::unmap();
// Go to usermode
asm!("mov ds, r14d
llvm_asm!("mov ds, r14d
mov es, r14d
mov fs, r15d
mov gs, r14d

8
src/arch/x86_64/stop.rs
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@@ -15,9 +15,9 @@ pub unsafe extern fn kreset() -> ! {
}
// Use triple fault to guarantee reset
asm!("cli" : : : : "intel", "volatile");
asm!("lidt cs:0" : : : : "intel", "volatile");
asm!("int $$3" : : : : "intel", "volatile");
llvm_asm!("cli" : : : : "intel", "volatile");
llvm_asm!("lidt cs:0" : : : : "intel", "volatile");
llvm_asm!("int $$3" : : : : "intel", "volatile");
unreachable!();
}
@@ -47,6 +47,6 @@ pub unsafe extern fn kstop() -> ! {
// Magic code for VMWare. Also a hard lock.
println!("Shutdown with cli hlt");
loop {
asm!("cli; hlt" : : : : "intel", "volatile");
llvm_asm!("cli; hlt" : : : : "intel", "volatile");
}
}

48
src/context/arch/x86_64.rs
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@@ -132,42 +132,42 @@ impl Context {
#[inline(never)]
#[naked]
pub unsafe fn switch_to(&mut self, next: &mut Context) {
asm!("fxsave64 [$0]" : : "r"(self.fx) : "memory" : "intel", "volatile");
llvm_asm!("fxsave64 [$0]" : : "r"(self.fx) : "memory" : "intel", "volatile");
self.loadable = true;
if next.loadable {
asm!("fxrstor64 [$0]" : : "r"(next.fx) : "memory" : "intel", "volatile");
llvm_asm!("fxrstor64 [$0]" : : "r"(next.fx) : "memory" : "intel", "volatile");
}else{
asm!("fninit" : : : "memory" : "intel", "volatile");
llvm_asm!("fninit" : : : "memory" : "intel", "volatile");
}
asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
llvm_asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
if next.cr3 != self.cr3 {
asm!("mov cr3, $0" : : "r"(next.cr3) : "memory" : "intel", "volatile");
llvm_asm!("mov cr3, $0" : : "r"(next.cr3) : "memory" : "intel", "volatile");
}
asm!("pushfq ; pop $0" : "=r"(self.rflags) : : "memory" : "intel", "volatile");
asm!("push $0 ; popfq" : : "r"(next.rflags) : "memory" : "intel", "volatile");
llvm_asm!("pushfq ; pop $0" : "=r"(self.rflags) : : "memory" : "intel", "volatile");
llvm_asm!("push $0 ; popfq" : : "r"(next.rflags) : "memory" : "intel", "volatile");
asm!("mov $0, rbx" : "=r"(self.rbx) : : "memory" : "intel", "volatile");
asm!("mov rbx, $0" : : "r"(next.rbx) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, rbx" : "=r"(self.rbx) : : "memory" : "intel", "volatile");
llvm_asm!("mov rbx, $0" : : "r"(next.rbx) : "memory" : "intel", "volatile");
asm!("mov $0, r12" : "=r"(self.r12) : : "memory" : "intel", "volatile");
asm!("mov r12, $0" : : "r"(next.r12) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, r12" : "=r"(self.r12) : : "memory" : "intel", "volatile");
llvm_asm!("mov r12, $0" : : "r"(next.r12) : "memory" : "intel", "volatile");
asm!("mov $0, r13" : "=r"(self.r13) : : "memory" : "intel", "volatile");
asm!("mov r13, $0" : : "r"(next.r13) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, r13" : "=r"(self.r13) : : "memory" : "intel", "volatile");
llvm_asm!("mov r13, $0" : : "r"(next.r13) : "memory" : "intel", "volatile");
asm!("mov $0, r14" : "=r"(self.r14) : : "memory" : "intel", "volatile");
asm!("mov r14, $0" : : "r"(next.r14) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, r14" : "=r"(self.r14) : : "memory" : "intel", "volatile");
llvm_asm!("mov r14, $0" : : "r"(next.r14) : "memory" : "intel", "volatile");
asm!("mov $0, r15" : "=r"(self.r15) : : "memory" : "intel", "volatile");
asm!("mov r15, $0" : : "r"(next.r15) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, r15" : "=r"(self.r15) : : "memory" : "intel", "volatile");
llvm_asm!("mov r15, $0" : : "r"(next.r15) : "memory" : "intel", "volatile");
asm!("mov $0, rsp" : "=r"(self.rsp) : : "memory" : "intel", "volatile");
asm!("mov rsp, $0" : : "r"(next.rsp) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, rsp" : "=r"(self.rsp) : : "memory" : "intel", "volatile");
llvm_asm!("mov rsp, $0" : : "r"(next.rsp) : "memory" : "intel", "volatile");
asm!("mov $0, rbp" : "=r"(self.rbp) : : "memory" : "intel", "volatile");
asm!("mov rbp, $0" : : "r"(next.rbp) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, rbp" : "=r"(self.rbp) : : "memory" : "intel", "volatile");
llvm_asm!("mov rbp, $0" : : "r"(next.rbp) : "memory" : "intel", "volatile");
// Unset global lock after loading registers but before switch
CONTEXT_SWITCH_LOCK.store(false, Ordering::SeqCst);
@@ -199,7 +199,7 @@ unsafe extern fn signal_handler_wrapper() {
}
// Push scratch registers
asm!("push rax
llvm_asm!("push rax
push rcx
push rdx
push rdi
@@ -212,13 +212,13 @@ unsafe extern fn signal_handler_wrapper() {
// Get reference to stack variables
let rsp: usize;
asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
llvm_asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
// Call inner rust function
inner(&*(rsp as *const SignalHandlerStack));
// Pop scratch registers, error code, and return
asm!("pop r11
llvm_asm!("pop r11
pop r10
pop r9
pop r8

3
src/lib.rs
View File

@@ -41,14 +41,13 @@
#![deny(unreachable_patterns)]
#![feature(allocator_api)]
#![feature(asm)]
#![feature(llvm_asm)]
#![feature(concat_idents)]
#![feature(const_fn)]
#![feature(core_intrinsics)]
#![feature(global_asm)]
#![feature(integer_atomics)]
#![feature(lang_items)]
#![feature(matches_macro)] // stable in current Rust
#![feature(naked_functions)]
#![feature(ptr_internals)]
#![feature(thread_local)]