WIP: Use a different IDT for each processor.
This commit is contained in:
4lDO2
@@ -1,5 +1,9 @@
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use core::mem;
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use core::num::NonZeroU8;
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use core::sync::atomic::{AtomicU64, Ordering};
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use core::mem;
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use alloc::boxed::Box;
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use alloc::collections::BTreeMap;
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use x86::segmentation::Descriptor as X86IdtEntry;
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use x86::dtables::{self, DescriptorTablePointer};
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@@ -7,45 +11,92 @@ use x86::dtables::{self, DescriptorTablePointer};
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use crate::interrupt::*;
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use crate::ipi::IpiKind;
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use spin::Mutex;
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use spin::RwLock;
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pub static mut INIT_IDTR: DescriptorTablePointer<X86IdtEntry> = DescriptorTablePointer {
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limit: 0,
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base: 0 as *const X86IdtEntry
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};
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#[thread_local]
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pub static mut IDTR: DescriptorTablePointer<X86IdtEntry> = DescriptorTablePointer {
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limit: 0,
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base: 0 as *const X86IdtEntry
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};
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// TODO: It's probably a good idea to use a separate IDT (and IDT_RESERVATIONS) for each CPU.
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// Currently 202 interrupts are freely allocatable, for the IDT, but if different CPUs received
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// different IDTs, the number would go up to e.g. 1616 IRQs on a processor with 8 logical CPUs.
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pub type IdtEntries = [IdtEntry; 256];
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pub type IdtReservations = [AtomicU64; 4];
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pub static mut IDT: [IdtEntry; 256] = [IdtEntry::new(); 256];
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pub static IDT_RESERVATIONS: Mutex<[u64; 256 / 64]> = Mutex::new([0u64; 256 / 64]);
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#[repr(packed)]
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pub struct Idt {
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entries: IdtEntries,
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reservations: IdtReservations,
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}
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impl Idt {
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pub const fn new() -> Self {
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Self {
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entries: [IdtEntry::new(); 256],
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reservations: new_idt_reservations(),
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}
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}
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#[inline]
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pub fn is_reserved(&self, index: u8) -> bool {
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let byte_index = index / 64;
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let bit = index % 64;
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unsafe { &self.reservations[usize::from(byte_index)] }.load(Ordering::Acquire) & (1 << bit) != 0
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}
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#[inline]
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pub fn set_reserved(&self, index: u8, reserved: bool) {
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let byte_index = index / 64;
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let bit = index % 64;
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unsafe { &self.reservations[usize::from(byte_index)] }.fetch_or(u64::from(reserved) << bit, Ordering::AcqRel);
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}
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#[inline]
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pub fn is_reserved_mut(&mut self, index: u8) -> bool {
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let byte_index = index / 64;
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let bit = index % 64;
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*unsafe { &mut self.reservations[usize::from(byte_index)] }.get_mut() & (1 << bit) != 0
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}
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#[inline]
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pub fn set_reserved_mut(&mut self, index: u8, reserved: bool) {
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let byte_index = index / 64;
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let bit = index % 64;
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*unsafe { &mut self.reservations[usize::from(byte_index)] }.get_mut() |= u64::from(reserved) << bit;
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}
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}
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static mut INIT_BSP_IDT: Idt = Idt::new();
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// TODO: VecMap?
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pub static IDTS: RwLock<Option<BTreeMap<usize, &'static mut Idt>>> = RwLock::new(None);
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#[inline]
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pub fn is_reserved(index: u8) -> bool {
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pub fn is_reserved(cpu_id: usize, index: u8) -> bool {
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let byte_index = index / 64;
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let bit = index % 64;
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IDT_RESERVATIONS.lock()[usize::from(byte_index)] & (1 << bit) != 0
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unsafe { &IDTS.read().as_ref().unwrap().get(&cpu_id).unwrap().reservations[usize::from(byte_index)] }.load(Ordering::Acquire) & (1 << bit) != 0
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}
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#[inline]
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pub fn set_reserved(index: u8, reserved: bool) {
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pub fn set_reserved(cpu_id: usize, index: u8, reserved: bool) {
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let byte_index = index / 64;
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let bit = index % 64;
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IDT_RESERVATIONS.lock()[usize::from(byte_index)] |= u64::from(reserved) << bit;
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unsafe { &IDTS.read().as_ref().unwrap().get(&cpu_id).unwrap().reservations[usize::from(byte_index)] }.fetch_or(u64::from(reserved) << bit, Ordering::AcqRel);
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}
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pub fn allocate_interrupt() -> Option<NonZeroU8> {
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let cpu_id = crate::cpu_id();
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for number in 50..=254 {
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if ! is_reserved(number) {
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set_reserved(number, true);
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if ! is_reserved(cpu_id, number) {
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set_reserved(cpu_id, number, true);
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return Some(unsafe { NonZeroU8::new_unchecked(number) });
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}
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}
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@@ -53,19 +104,20 @@ pub fn allocate_interrupt() -> Option<NonZeroU8> {
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}
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pub fn available_irqs_iter() -> impl Iterator<Item = u8> + 'static {
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(50..=254).filter(|&index| !is_reserved(index))
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let cpu_id = crate::cpu_id();
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(50..=254).filter(move |&index| !is_reserved(cpu_id, index))
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}
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macro_rules! use_irq(
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( $number:literal, $func:ident ) => {
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IDT[$number].set_func($func);
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}
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( $idt: expr, $number:literal, $func:ident ) => {{
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$idt[$number].set_func($func);
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}}
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);
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macro_rules! use_default_irqs(
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() => {{
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($idt:expr) => {{
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use crate::interrupt::irq::*;
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default_irqs!(use_irq);
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default_irqs!($idt, use_irq);
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}}
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);
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@@ -73,79 +125,106 @@ pub unsafe fn init() {
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dtables::lidt(&INIT_IDTR);
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}
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const fn new_idt_reservations() -> [AtomicU64; 4] {
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[AtomicU64::new(0), AtomicU64::new(0), AtomicU64::new(0), AtomicU64::new(0)]
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}
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pub unsafe fn init_paging_post_heap(is_bsp: bool, cpu_id: usize) {
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let mut idts_guard = IDTS.write();
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let idts_btree = idts_guard.get_or_insert_with(|| BTreeMap::new());
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let idt = idts_btree.entry(cpu_id).or_insert_with(|| Box::leak(Box::new(Idt::new())));
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if is_bsp {
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*idt = &mut INIT_BSP_IDT;
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} else {
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init_generic(is_bsp, idt)
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}
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}
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pub unsafe fn init_paging() {
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IDTR.limit = (IDT.len() * mem::size_of::<IdtEntry>() - 1) as u16;
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IDTR.base = IDT.as_ptr() as *const X86IdtEntry;
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init_generic(true, &mut INIT_BSP_IDT);
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}
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pub unsafe fn init_generic(is_bsp: bool, idt: &mut Idt) {
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let (current_idt, current_reservations) = (&mut idt.entries, &mut idt.reservations);
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IDTR.limit = (current_idt.len() * mem::size_of::<IdtEntry>() - 1) as u16;
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IDTR.base = current_idt.as_ptr() as *const X86IdtEntry;
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// Set up exceptions
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IDT[0].set_func(exception::divide_by_zero);
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IDT[1].set_func(exception::debug);
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IDT[2].set_func(exception::non_maskable);
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IDT[3].set_func(exception::breakpoint);
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IDT[3].set_flags(IdtFlags::PRESENT | IdtFlags::RING_3 | IdtFlags::INTERRUPT);
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IDT[4].set_func(exception::overflow);
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IDT[5].set_func(exception::bound_range);
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IDT[6].set_func(exception::invalid_opcode);
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IDT[7].set_func(exception::device_not_available);
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IDT[8].set_func(exception::double_fault);
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current_idt[0].set_func(exception::divide_by_zero);
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current_idt[1].set_func(exception::debug);
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current_idt[2].set_func(exception::non_maskable);
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current_idt[3].set_func(exception::breakpoint);
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current_idt[3].set_flags(IdtFlags::PRESENT | IdtFlags::RING_3 | IdtFlags::INTERRUPT);
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current_idt[4].set_func(exception::overflow);
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current_idt[5].set_func(exception::bound_range);
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current_idt[6].set_func(exception::invalid_opcode);
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current_idt[7].set_func(exception::device_not_available);
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current_idt[8].set_func(exception::double_fault);
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// 9 no longer available
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IDT[10].set_func(exception::invalid_tss);
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IDT[11].set_func(exception::segment_not_present);
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IDT[12].set_func(exception::stack_segment);
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IDT[13].set_func(exception::protection);
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IDT[14].set_func(exception::page);
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current_idt[10].set_func(exception::invalid_tss);
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current_idt[11].set_func(exception::segment_not_present);
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current_idt[12].set_func(exception::stack_segment);
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current_idt[13].set_func(exception::protection);
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current_idt[14].set_func(exception::page);
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// 15 reserved
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IDT[16].set_func(exception::fpu);
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IDT[17].set_func(exception::alignment_check);
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IDT[18].set_func(exception::machine_check);
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IDT[19].set_func(exception::simd);
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IDT[20].set_func(exception::virtualization);
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current_idt[16].set_func(exception::fpu);
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current_idt[17].set_func(exception::alignment_check);
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current_idt[18].set_func(exception::machine_check);
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current_idt[19].set_func(exception::simd);
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current_idt[20].set_func(exception::virtualization);
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// 21 through 29 reserved
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IDT[30].set_func(exception::security);
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current_idt[30].set_func(exception::security);
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// 31 reserved
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// reserve bits 31:0, i.e. the first 32 interrupts, which are reserved for exceptions
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IDT_RESERVATIONS.lock()[0] |= 0x0000_0000_FFFF_FFFF;
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*current_reservations[0].get_mut() |= 0x0000_0000_FFFF_FFFF;
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// Set up IRQs
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IDT[32].set_func(irq::pit);
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IDT[33].set_func(irq::keyboard);
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IDT[34].set_func(irq::cascade);
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IDT[35].set_func(irq::com2);
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IDT[36].set_func(irq::com1);
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IDT[37].set_func(irq::lpt2);
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IDT[38].set_func(irq::floppy);
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IDT[39].set_func(irq::lpt1);
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IDT[40].set_func(irq::rtc);
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IDT[41].set_func(irq::pci1);
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IDT[42].set_func(irq::pci2);
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IDT[43].set_func(irq::pci3);
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IDT[44].set_func(irq::mouse);
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IDT[45].set_func(irq::fpu);
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IDT[46].set_func(irq::ata1);
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IDT[47].set_func(irq::ata2);
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IDT[48].set_func(irq::lapic_timer);
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IDT[49].set_func(irq::lapic_error);
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if is_bsp {
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// Set up IRQs
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current_idt[32].set_func(irq::pit);
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current_idt[33].set_func(irq::keyboard);
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current_idt[34].set_func(irq::cascade);
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current_idt[35].set_func(irq::com2);
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current_idt[36].set_func(irq::com1);
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current_idt[37].set_func(irq::lpt2);
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current_idt[38].set_func(irq::floppy);
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current_idt[39].set_func(irq::lpt1);
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current_idt[40].set_func(irq::rtc);
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current_idt[41].set_func(irq::pci1);
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current_idt[42].set_func(irq::pci2);
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current_idt[43].set_func(irq::pci3);
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current_idt[44].set_func(irq::mouse);
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current_idt[45].set_func(irq::fpu);
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current_idt[46].set_func(irq::ata1);
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current_idt[47].set_func(irq::ata2);
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current_idt[48].set_func(irq::lapic_timer);
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current_idt[49].set_func(irq::lapic_error);
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use_default_irqs!();
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// reserve bits 49:32, which are for the standard IRQs, and for the local apic timer and error.
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IDT_RESERVATIONS.lock()[0] |= 0x0003_FFFF_0000_0000;
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// reserve bits 49:32, which are for the standard IRQs, and for the local apic timer and error.
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*current_reservations[0].get_mut() |= 0x0003_FFFF_0000_0000;
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} else {
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// TODO: use_default_irqs! but also the legacy IRQs that are only needed on one CPU
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}
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use_default_irqs!(current_idt);
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// Set IPI handlers
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IDT[IpiKind::Wakeup as usize].set_func(ipi::wakeup);
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IDT[IpiKind::Switch as usize].set_func(ipi::switch);
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IDT[IpiKind::Tlb as usize].set_func(ipi::tlb);
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IDT[IpiKind::Pit as usize].set_func(ipi::pit);
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set_reserved(IpiKind::Wakeup as u8, true);
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set_reserved(IpiKind::Switch as u8, true);
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set_reserved(IpiKind::Tlb as u8, true);
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set_reserved(IpiKind::Pit as u8, true);
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current_idt[IpiKind::Wakeup as usize].set_func(ipi::wakeup);
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current_idt[IpiKind::Switch as usize].set_func(ipi::switch);
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current_idt[IpiKind::Tlb as usize].set_func(ipi::tlb);
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current_idt[IpiKind::Pit as usize].set_func(ipi::pit);
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idt.set_reserved_mut(IpiKind::Wakeup as u8, true);
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idt.set_reserved_mut(IpiKind::Switch as u8, true);
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idt.set_reserved_mut(IpiKind::Tlb as u8, true);
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idt.set_reserved_mut(IpiKind::Pit as u8, true);
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let current_idt = &mut idt.entries;
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// Set syscall function
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IDT[0x80].set_func(syscall::syscall);
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IDT[0x80].set_flags(IdtFlags::PRESENT | IdtFlags::RING_3 | IdtFlags::INTERRUPT);
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set_reserved(0x80, true);
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current_idt[0x80].set_func(syscall::syscall);
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current_idt[0x80].set_flags(IdtFlags::PRESENT | IdtFlags::RING_3 | IdtFlags::INTERRUPT);
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idt.set_reserved_mut(0x80, true);
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dtables::lidt(&IDTR);
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}
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@@ -163,7 +242,7 @@ bitflags! {
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}
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}
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#[derive(Copy, Clone, Debug)]
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#[derive(Copy, Clone, Debug, Default)]
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#[repr(packed)]
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pub struct IdtEntry {
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offsetl: u16,
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@@ -308,7 +308,7 @@ interrupt!(calib_pit, {
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// XXX: This would look way prettier using const generics.
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macro_rules! allocatable_irq(
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( $number:literal, $name:ident ) => {
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( $idt:expr, $number:literal, $name:ident ) => {
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interrupt!($name, {
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allocatable_irq_generic($number);
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});
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@@ -394,9 +394,9 @@ macro_rules! interrupt_error {
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}
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#[macro_export]
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macro_rules! irqs(
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( [ $( ($number:literal, $name:ident) ,)* ], $submac:ident ) => {
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( [ $( ($idt:expr, $number:literal, $name:ident) ,)* ], $submac:ident ) => {
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$(
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$submac!($number, $name);
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$submac!($idt, $number, $name);
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)*
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}
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);
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@@ -405,42 +405,42 @@ macro_rules! irqs(
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// allocatable_irq_NUM.
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#[macro_export]
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macro_rules! default_irqs(
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($submac:ident) => {
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($idt:expr, $submac:ident) => {
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irqs!([
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// interrupt vectors below 32 are exceptions
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// vectors 32..=47 are used for standard 8259 pic irqs.
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// 48 and 49 are used for the local APIC timer and error register, respectively.
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(50, irq_50), (51, irq_51), (52, irq_52), (53, irq_53), (54, irq_54), (55, irq_55), (56, irq_56), (57, irq_57), (58, irq_58), (59, irq_59),
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(60, irq_60), (61, irq_61), (62, irq_62), (63, irq_63),
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($idt, 50, irq_50), ($idt, 51, irq_51), ($idt, 52, irq_52), ($idt, 53, irq_53), ($idt, 54, irq_54), ($idt, 55, irq_55), ($idt, 56, irq_56), ($idt, 57, irq_57), ($idt, 58, irq_58), ($idt, 59, irq_59),
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($idt, 60, irq_60), ($idt, 61, irq_61), ($idt, 62, irq_62), ($idt, 63, irq_63),
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// 64..=67 used for IPI
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(68, irq_68), (69, irq_69),
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(70, irq_70), (71, irq_71), (72, irq_72), (73, irq_73), (74, irq_74), (75, irq_75), (76, irq_76), (77, irq_77), (78, irq_78), (79, irq_79),
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(80, irq_80), (81, irq_81), (82, irq_82), (83, irq_83), (84, irq_84), (85, irq_85), (86, irq_86), (87, irq_87), (88, irq_88), (89, irq_89),
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(90, irq_90), (91, irq_91), (92, irq_92), (93, irq_93), (94, irq_94), (95, irq_95), (96, irq_96), (97, irq_97), (98, irq_98), (99, irq_99),
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(100, irq_100), (101, irq_101), (102, irq_102), (103, irq_103), (104, irq_104), (105, irq_105), (106, irq_106), (107, irq_107), (108, irq_108), (109, irq_109),
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(110, irq_110), (111, irq_111), (112, irq_112), (113, irq_113), (114, irq_114), (115, irq_115), (116, irq_116), (117, irq_117), (118, irq_118), (119, irq_119),
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(120, irq_120), (121, irq_121), (122, irq_122), (123, irq_123), (124, irq_124), (125, irq_125), (126, irq_126), (127, irq_127),
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||||
($idt, 68, irq_68), ($idt, 69, irq_69),
|
||||
($idt, 70, irq_70), ($idt, 71, irq_71), ($idt, 72, irq_72), ($idt, 73, irq_73), ($idt, 74, irq_74), ($idt, 75, irq_75), ($idt, 76, irq_76), ($idt, 77, irq_77), ($idt, 78, irq_78), ($idt, 79, irq_79),
|
||||
($idt, 80, irq_80), ($idt, 81, irq_81), ($idt, 82, irq_82), ($idt, 83, irq_83), ($idt, 84, irq_84), ($idt, 85, irq_85), ($idt, 86, irq_86), ($idt, 87, irq_87), ($idt, 88, irq_88), ($idt, 89, irq_89),
|
||||
($idt, 90, irq_90), ($idt, 91, irq_91), ($idt, 92, irq_92), ($idt, 93, irq_93), ($idt, 94, irq_94), ($idt, 95, irq_95), ($idt, 96, irq_96), ($idt, 97, irq_97), ($idt, 98, irq_98), ($idt, 99, irq_99),
|
||||
($idt, 100, irq_100), ($idt, 101, irq_101), ($idt, 102, irq_102), ($idt, 103, irq_103), ($idt, 104, irq_104), ($idt, 105, irq_105), ($idt, 106, irq_106), ($idt, 107, irq_107), ($idt, 108, irq_108), ($idt, 109, irq_109),
|
||||
($idt, 110, irq_110), ($idt, 111, irq_111), ($idt, 112, irq_112), ($idt, 113, irq_113), ($idt, 114, irq_114), ($idt, 115, irq_115), ($idt, 116, irq_116), ($idt, 117, irq_117), ($idt, 118, irq_118), ($idt, 119, irq_119),
|
||||
($idt, 120, irq_120), ($idt, 121, irq_121), ($idt, 122, irq_122), ($idt, 123, irq_123), ($idt, 124, irq_124), ($idt, 125, irq_125), ($idt, 126, irq_126), ($idt, 127, irq_127),
|
||||
// 128 is used for software interrupts
|
||||
(129, irq_129),
|
||||
(130, irq_130), (131, irq_131), (132, irq_132), (133, irq_133), (134, irq_134), (135, irq_135), (136, irq_136), (137, irq_137), (138, irq_138), (139, irq_139),
|
||||
(140, irq_140), (141, irq_141), (142, irq_142), (143, irq_143), (144, irq_144), (145, irq_145), (146, irq_146), (147, irq_147), (148, irq_148), (149, irq_149),
|
||||
(150, irq_150), (151, irq_151), (152, irq_152), (153, irq_153), (154, irq_154), (155, irq_155), (156, irq_156), (157, irq_157), (158, irq_158), (159, irq_159),
|
||||
(160, irq_160), (161, irq_161), (162, irq_162), (163, irq_163), (164, irq_164), (165, irq_165), (166, irq_166), (167, irq_167), (168, irq_168), (169, irq_169),
|
||||
(170, irq_170), (171, irq_171), (172, irq_172), (173, irq_173), (174, irq_174), (175, irq_175), (176, irq_176), (177, irq_177), (178, irq_178), (179, irq_179),
|
||||
(180, irq_180), (181, irq_181), (182, irq_182), (183, irq_183), (184, irq_184), (185, irq_185), (186, irq_186), (187, irq_187), (188, irq_188), (189, irq_189),
|
||||
(190, irq_190), (191, irq_191), (192, irq_192), (193, irq_193), (194, irq_194), (195, irq_195), (196, irq_196), (197, irq_197), (198, irq_198), (199, irq_199),
|
||||
(200, irq_200), (201, irq_201), (202, irq_202), (203, irq_203), (204, irq_204), (205, irq_205), (206, irq_206), (207, irq_207), (208, irq_208), (209, irq_209),
|
||||
(210, irq_210), (211, irq_211), (212, irq_212), (213, irq_213), (214, irq_214), (215, irq_215), (216, irq_216), (217, irq_217), (218, irq_218), (219, irq_219),
|
||||
(220, irq_220), (221, irq_221), (222, irq_222), (223, irq_223), (224, irq_224), (225, irq_225), (226, irq_226), (227, irq_227), (228, irq_228), (229, irq_229),
|
||||
(230, irq_230), (231, irq_231), (232, irq_232), (233, irq_233), (234, irq_234), (235, irq_235), (236, irq_236), (237, irq_237), (238, irq_238), (239, irq_239),
|
||||
(240, irq_240), (241, irq_241), (242, irq_242), (243, irq_243), (244, irq_244), (245, irq_245), (246, irq_246), (247, irq_247), (248, irq_248), (249, irq_249),
|
||||
(250, irq_250), (251, irq_251), (252, irq_252), (253, irq_253), (254, irq_254), (255, irq_255),
|
||||
($idt, 129, irq_129),
|
||||
($idt, 130, irq_130), ($idt, 131, irq_131), ($idt, 132, irq_132), ($idt, 133, irq_133), ($idt, 134, irq_134), ($idt, 135, irq_135), ($idt, 136, irq_136), ($idt, 137, irq_137), ($idt, 138, irq_138), ($idt, 139, irq_139),
|
||||
($idt, 140, irq_140), ($idt, 141, irq_141), ($idt, 142, irq_142), ($idt, 143, irq_143), ($idt, 144, irq_144), ($idt, 145, irq_145), ($idt, 146, irq_146), ($idt, 147, irq_147), ($idt, 148, irq_148), ($idt, 149, irq_149),
|
||||
($idt, 150, irq_150), ($idt, 151, irq_151), ($idt, 152, irq_152), ($idt, 153, irq_153), ($idt, 154, irq_154), ($idt, 155, irq_155), ($idt, 156, irq_156), ($idt, 157, irq_157), ($idt, 158, irq_158), ($idt, 159, irq_159),
|
||||
($idt, 160, irq_160), ($idt, 161, irq_161), ($idt, 162, irq_162), ($idt, 163, irq_163), ($idt, 164, irq_164), ($idt, 165, irq_165), ($idt, 166, irq_166), ($idt, 167, irq_167), ($idt, 168, irq_168), ($idt, 169, irq_169),
|
||||
($idt, 170, irq_170), ($idt, 171, irq_171), ($idt, 172, irq_172), ($idt, 173, irq_173), ($idt, 174, irq_174), ($idt, 175, irq_175), ($idt, 176, irq_176), ($idt, 177, irq_177), ($idt, 178, irq_178), ($idt, 179, irq_179),
|
||||
($idt, 180, irq_180), ($idt, 181, irq_181), ($idt, 182, irq_182), ($idt, 183, irq_183), ($idt, 184, irq_184), ($idt, 185, irq_185), ($idt, 186, irq_186), ($idt, 187, irq_187), ($idt, 188, irq_188), ($idt, 189, irq_189),
|
||||
($idt, 190, irq_190), ($idt, 191, irq_191), ($idt, 192, irq_192), ($idt, 193, irq_193), ($idt, 194, irq_194), ($idt, 195, irq_195), ($idt, 196, irq_196), ($idt, 197, irq_197), ($idt, 198, irq_198), ($idt, 199, irq_199),
|
||||
($idt, 200, irq_200), ($idt, 201, irq_201), ($idt, 202, irq_202), ($idt, 203, irq_203), ($idt, 204, irq_204), ($idt, 205, irq_205), ($idt, 206, irq_206), ($idt, 207, irq_207), ($idt, 208, irq_208), ($idt, 209, irq_209),
|
||||
($idt, 210, irq_210), ($idt, 211, irq_211), ($idt, 212, irq_212), ($idt, 213, irq_213), ($idt, 214, irq_214), ($idt, 215, irq_215), ($idt, 216, irq_216), ($idt, 217, irq_217), ($idt, 218, irq_218), ($idt, 219, irq_219),
|
||||
($idt, 220, irq_220), ($idt, 221, irq_221), ($idt, 222, irq_222), ($idt, 223, irq_223), ($idt, 224, irq_224), ($idt, 225, irq_225), ($idt, 226, irq_226), ($idt, 227, irq_227), ($idt, 228, irq_228), ($idt, 229, irq_229),
|
||||
($idt, 230, irq_230), ($idt, 231, irq_231), ($idt, 232, irq_232), ($idt, 233, irq_233), ($idt, 234, irq_234), ($idt, 235, irq_235), ($idt, 236, irq_236), ($idt, 237, irq_237), ($idt, 238, irq_238), ($idt, 239, irq_239),
|
||||
($idt, 240, irq_240), ($idt, 241, irq_241), ($idt, 242, irq_242), ($idt, 243, irq_243), ($idt, 244, irq_244), ($idt, 245, irq_245), ($idt, 246, irq_246), ($idt, 247, irq_247), ($idt, 248, irq_248), ($idt, 249, irq_249),
|
||||
($idt, 250, irq_250), ($idt, 251, irq_251), ($idt, 252, irq_252), ($idt, 253, irq_253), ($idt, 254, irq_254), ($idt, 255, irq_255),
|
||||
], $submac);
|
||||
}
|
||||
);
|
||||
|
||||
macro_rules! define_default_irqs(
|
||||
() => {
|
||||
default_irqs!(allocatable_irq);
|
||||
default_irqs!((), allocatable_irq);
|
||||
}
|
||||
);
|
||||
|
||||
@@ -132,6 +132,8 @@ pub unsafe extern fn kstart(args_ptr: *const KernelArgs) -> ! {
|
||||
// Setup kernel heap
|
||||
allocator::init(&mut active_table);
|
||||
|
||||
idt::init_paging_post_heap(true, 0);
|
||||
|
||||
// Activate memory logging
|
||||
log::init();
|
||||
|
||||
@@ -200,7 +202,7 @@ pub unsafe extern fn kstart_ap(args_ptr: *const KernelArgsAp) -> ! {
|
||||
gdt::init_paging(tcb_offset, stack_end);
|
||||
|
||||
// Set up IDT for AP
|
||||
idt::init_paging();
|
||||
idt::init_paging_post_heap(false, cpu_id);
|
||||
|
||||
// Set up syscall instruction
|
||||
interrupt::syscall::init();
|
||||
|
||||
@@ -127,11 +127,11 @@ impl Scheme for IrqScheme {
|
||||
return Err(Error::new(EINVAL));
|
||||
}
|
||||
if flags & O_STAT == 0 {
|
||||
|
||||
if is_reserved(irq_to_vector(id)) {
|
||||
// FIXME
|
||||
if is_reserved(0, irq_to_vector(id)) {
|
||||
return Err(Error::new(EEXIST));
|
||||
}
|
||||
set_reserved(irq_to_vector(id), true);
|
||||
set_reserved(0, irq_to_vector(id), true);
|
||||
}
|
||||
Handle::Irq { ack: AtomicUsize::new(0), irq: id }
|
||||
} else {
|
||||
@@ -298,7 +298,7 @@ impl Scheme for IrqScheme {
|
||||
|
||||
if let &Handle::Irq { irq: handle_irq, .. } = handle {
|
||||
if handle_irq > BASE_IRQ_COUNT {
|
||||
set_reserved(irq_to_vector(handle_irq), false);
|
||||
set_reserved(0, irq_to_vector(handle_irq), false);
|
||||
}
|
||||
}
|
||||
Ok(0)
|
||||
|
||||
Reference in New Issue
Block a user